Investigation of Capacitor Voltage Balancing in Practical Implementations of Flying Capacitor Multilevel Converters

Abstract

Capacitor voltage natural balancing is an attractive feature of flying capacitor multilevel (FCML) converters. However, with the commonly used phase-shifted pulsewidth modulation, the capacitor voltages still can deviate, and active balancing is often required. Although the natural balancing mechanism and its dynamics have been extensively studied in existing literature, some sources that are responsible for capacitor imbalance in engineering practice are still unclear. This article experimentally investigates the origins of the voltage imbalance in practical implementations of such converters. It presents the corresponding circuit analysis as well as solutions that improve balancing. It is shown that the source impedance and the input capacitance can greatly deteriorate capacitor balancing. Moreover, we also demonstrate in theory and with experiments that an FCML converter with an even number of levels inherently has stronger immunity to such disturbance than that with an odd number of levels. It is also found that the gate signal propagation delay mismatch in half-bridge gate drivers can lead to capacitor imbalance, and this problem is addressed by an alternative gate drive power supply design. Finally, the variations of <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> -state resistance among different switches are found to have a relatively small impact on capacitor voltage balancing.