Investigation and optimization of traps properties in Al2O3/SiO2 dielectric stacks using conductance method

Abstract

In this work, the properties of the interface traps between various Al2O3/SiO2 dielectric stacks and Si substrate are investigated by the conductance method. The trap state density and energy level distribution in the silicon bandgap are extracted for four stacks fabricated by different processes. Our results indicate that the trap state density can be optimized so that Al2O3/SiO2 can be advantageous for nano-scale transistors and resistive switching memory.