Investigation and Modeling of Stress Interactions on 90 nm Silicon on Insulator Complementary Metal Oxide Semiconductor by Various Mobility Enhancement Approaches

Abstract

The interactions of shallow trench isolation (STI) stress and various mobility enhancement approaches in silicon on insulator (SOI) complementary metal oxide semiconductor (CMOS) have been systematically studied. Strong interactions between STI stress and contact etch stop layer (CESL) stress on channel mobility were observed which was attributed to the amplification of CESL channel tensile stress with length of diffusion (LOD) reduction. In this work, an almost completely reversed P-channel metal oxide semiconductor field-effect transistor (PMOSFET) mobility-LOD trend in both <110 >/(100) and <100 >/(100) oriented SOI wafers was found, which is caused by the reversed polarity of piezoresistance coefficients. On the other hand, charge pumping leakage was enhanced by the post-gate oxide stress (CESL stress) only, and was not affected by any stress applied prior to the gate oxidation step (STI stress).