Combining a Novel Charge-Based Capacitance Measurement (CBCM) Technique and Split $C$–$V$ Method to Specifically Characterize the STI Stress Effect Along the Width Direction of MOSFET Devices

Abstract

The shallow trench isolation (STI) stress effect along the length direction on short-channel MOSFET devices has already been widely studied. However, the effect along the width direction has seldom been specifically analyzed. In this paper, we combine a novel charge-based capacitance measurement technique, which is used to extract the intrinsic of MOSFET devices, and the split capacitance-voltage method to extract the mobility of devices with various channel widths. Although it is already known that under the influence of compressive STI stress along the width direction the mobility of both NMOS and PMOS devices will degrade with decreasing width, it is the first time to quantify the impact of this STI stress component on MOSFET devices.