Abstract

Wide-bandgap technology evolution compels the advancement of efficient pulse-width gate-driver devices. Integrated enhanced gate-driver planar transformers are a source of electromagnetic disturbances due to inter-winding capacitances, which serve as a route to common-mode (CM) currents. This paper will simulate, via ANSYS Q3D Extractor, the unforeseen parasitic effects of a pulse planar transformer integrated in a SiC MOSFET gate-driver card. Moreover, the pulse transformer will be ameliorated by adding distinctive shielding layers aiming to suppress CM noise effects and endure high dv/dt occurrences intending to validate experimental tests. The correlation between stray capacitance and dv/dt immunity results after shielding insertion will be reported.

Highlights

  • The evolution of electronic devices over the past few years has resulted in compelling impacts on the community and industry

  • The root cause of CM noise in planar transformers is the existence of stray capacitances between the primary and secondary windings

  • This uncertain performance can become evident by the exploitation of adequate software tools such as ANSYS Q3D Extractor to derive the parasitic RLGC parameters and further analyze the transformer

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Summary

Introduction

The evolution of electronic devices over the past few years has resulted in compelling impacts on the community and industry. Electromagnetic compatibility (EMC) conformity is crucial when designing gate driver circuits amid preserving high power density and minimum isolation capacitance This is attained by the utilization of planar transformers, which harmonize with the growing demand of slim-profile power supplies, and comprising low leakage inductance, repeatability, and low thermal resistance [15]. Traditional planar transformers present high levels of common-mode (CM) noise due to the presence of stray capacitances between primary and secondary windings providing a route for CM currents generated due to large dv/dt occurrences from fast switching devices. These circulating pulsating currents are the main originators of electromagnetic interference (EMI) issues [16]. MligOhStsFEthTast(mthetaplroaxcticidocemalmsesomwnlyictckohnnoidnwugnctatisomrMefOiseSloFdEfTetshffiesecsMht otOwranSnFisnEisTFtisogura)rer[e22.5r]eT.lhaetiavfoerleympenrtoiolnoendgdeedpicwtioitnh respeAcnt teoxtahme pthleeoorfehrteiihgscpehaelliccgtsohwttmosittpthhcaeohtsttihihnteeigooprnretaitmiccotaifcelassclw,osiwintcitthacrhiodnilngdlgetiidttmiimoeiness,stiounof ltatahdhetdeMidtiiOno-gSneFavtEotiTettsahfabeireeiilnrideetlvy-aeittoifavfbfeeilalcyittgpyrtaoorlflavoannagsgneiaisdlcvtwoainsritioshc,cloatmiomnosnalfyegkunaorwdinngasiisnModlaOetipoSneFsnEadfTeegsnuiatsrtdsrihanognwsinidnsteopinernFcdoiegnnutttrroeanl2s[.i2sTt6oh]r.ecoanftroorle[2m6]e. ntioned depiction highlights that the practical switching times of the MOSFETs are relatively prolonged with rlaeQtsiHpoVenDCc«stHatigofhestgiIdhIDeDuEe»EaAAtLrLhdeiOnoNrgeitin(itc)dOaFelFpvs(ewt)nidtcehnitntgratinmsINieHsst,oirncGaoATdnEdtDrRiVotIVGilEoS_R[HAn2ACC6tTT]oUU.AAtGSLhLHHeID_iHVnDeC vitaVbDSi_lHity

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Gate Driver Illustration
ANSYS Q3D Extractor and Dynamic Links
Planar Pulse Transformer Analyzed Models
Conclusions and Future Scope
Full Text
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