Abstract

Due to the series capacitor charging period miscalculation, the applicability of the current sharing mechanism (CSM) of two-phase series-capacitor buck topology (2-pscB) for medium-power electronic applications is still very limited. For traditional half-bridge gate driving circuits, inserting a series capacitor between power switches of phase A increases loop parasitic inductance, introduces a time delay mismatch between the gate voltages of the two switches, and causes interference with the synchronization of the deadtime between phase A&B of 2-pscB converters since phase B has no series capacitor. Using traditional half-bridge gate driving circuits in 2-pscB, the turn-off delay of phase A switches caused by its CDS discharging period appears and amplifies by parasitic effects and the phases' sinking path mismatch. This will eventually result in almost no deadtime conduction. In this paper, a lab prototype using a commercial EPC half-bridge GaN-based circuit has been designed and tested to investigate the deadtime mismatch and the behavior of CSM in the traditional isolated gate driving system.

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