Investigating and compensating printed circuit board shrinkage induced failures during reflow soldering

Abstract

Purpose – This paper aims to reveal the causes and find an efficient method to compensate the shrinkage to reduce failure costs. Reflow-induced printed circuit board (PCB) shrinkage is inspected in automotive electronics production environment. The shrinkage of two-sided, large PCBs results in printing offset errors and consequently soldering failures on smaller components during the reflow soldering of the second PCB side. Design/methodology/approach – During the research, the investigations had to adapt to actual production in an electronics manufacturing plant. A measurement method was developed to approximate the overall shrinkage of the given product. With the shrinkage data, it is possible to perform an efficient compensation on the given stencil design in computer-aided manufacturing environment. Findings – It was found that even with the investigated lower-quality PCB materials, the compensation on the stencil significantly reduces the quantity of failures, offering an efficient method to improve the yield of the production. Research limitations/implications – Research was oriented by the confines of production (fixed PCB sources, given PCB materials, reflow process and production line), where an immediate solution is needed. Future investigations should be focussed on the PCB parameters (different epoxy types, glass-fibre reinforcements, etc.). Practical implications – The optimised production reduces overall failure costs. The stencil re-design and application is a fast and efficient way to immediately act against the shrinkage-induced failures. The method was successfully applied in automotive electronics production. Originality/value – The paper presents a novel approach on solving an emerging problem during reflow.