Inversion-Type Ferroelectric Capacitive Memory and Its 1-Kbit Crossbar Array

Abstract

By modulating the capacitance to store data, ferroelectric capacitive memories (FCMs) show distinct advantages compared with the conventional resistive memories, including the near-zero static power, negligible read disturbance, and immunity to IR drop problem. However, the promise of FCMs requires the improvement of their electrical characteristics, including retention, capacitance ratio, and operation speed. In this work, by introducing a heavily doped region in the metal–ferroelectric–semiconductor (MFS) structure, we propose and experimentally demonstrate an inversion-type FCM device, which simultaneously achieves: 1) high ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times 125$ </tex-math></inline-formula> ) <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${C}_{\text {HCS}}/{C}_{\text {LCS}}$ </tex-math></inline-formula> ratio; 2) ten-year retention under 85 °C; 3) multistate operation; and 4) improved write speed in nanosecond range. Integrating the devices on Silicon on insulator (SOI) substrates, we also realize the 1-kbit inversion-type FCM crossbar array. By setting up a test platform with a specially designed drive circuit, the read/write operation of the capacitive array is successfully demonstrated, evidencing the stable operation of the capacitive memory device in the array level.