Interview

Abstract

Steven Pyle from the University of Central Florida talks to us about the work behind the paper ‘Compact Low-Power Instant Store and Restore D Flip-Flop using a Self-Complementing Spintronic Device’, page 1238 Steven Pyle Spintronics is an exciting field as researchers from physics, materials, and engineering are all working together to bring about a new generation of computational devices, using nano-sized magnets to realise logic and memory functionalities with less energy and greater density than previously possible. Theoretical limits of spintronic technology are superior to traditional CMOS, but achieving these benefits has been challenging so far. Data Flip-Flops (D F/Fs) are the primary high-speed memory unit found deep within microprocessors where the highest speed is required. Current CMOS-based D F/Fs are volatile, in that they lose their data when power is removed. As we approach the end of the transistor scaling roadmap, leakage current becomes the primary source of power draw and inefficiency. One way to mitigate this is to turn unused parts of the circuit off: power-gating. Many different spintronic devices are currently being researched to achieve a common goal: storing data within a nano-sized magnet, and then having a mechanism to read and write that data. Currently, most spintronic devices rely on charge current to modify the state of a nano-sized magnet, via mechanisms such as spin transfer torque. Read mechanisms usually employ the resistive difference that exists between states within a magnetic tunnel junction to differentiate stored values. In our paper, we develop a new type of D F/F that is intrinsically non-volatile by using a spintronic device to hold the data. Since the data is non-volatile, we show that power can be removed from the device and the correct data will be present when power is restored. This is in addition to having reduced transistor count compared to previous works, which is beneficial for reducing area cost. Although there have been previous non-volatile D F/F designs using spintronics, they required additional store and restore signalling and circuitry overhead to “backup” the volatile data into non-volatile devices. Our particular implementation allows data to be continuously saved and instantly restored without the store or restore overhead. In the short term, these results can help spur new ideas in interfacing spintronic devices directly with CMOS logic to realise the benefits of non-volatility and reduced area cost. In the long term, once spintronic device performance has overcome CMOS-specific limitations, researchers will have the opportunity to combine spintronics and CMOS to realise novel architectures not possible with volatile devices. This work makes use of a theoretical spintronic device that hasn't been fabricated yet, although similar devices have been proven. While further research is required before this work can be realised in real applications, this compact non-volatile D F/F would reduce area costs and allow increased power-savings by power-gating within digital logic applications. We have been continuing to explore new uses for spintronic devices within computers. In addition to pure memory applications, such as the Letter herein, we have developed novel designs in digital logic and reconfigurable fabrics. Our interests and goals align with bringing emerging computational devices and physical phenomena to the architecture and implementation level. Research into spintronics has been pretty exciting for about a decade so far, and in that time we've iterated through a few generations of devices, each with great improvements in energy and speed. I think that within the next ten years spintronic devices will be competitive with applications of CMOS, and researchers will be scratching the surface of new architectures that use the new technology.