Interview

Abstract

Dr. Patrick Goh of Universiti Sains Malaysia, talks to us about the work behind the paper ‘A voltage-in-current formulation for the latency insertion method for improved stability’, page 1904 Dr. Patrick Goh LIM is a fast transient circuit simulation technique for high-speed interconnects. It was first developed by Professor Jose E. Schutt-Aine at the University of Illinois at Urbana-Champaign and I had the opportunity to work with him for a couple of years to advance the method. With the continuous device scaling towards faster and more compact designs, the integrity of the signals on printed circuit boards and other interconnects often becomes an important factor in the design process to ensure proper operation. In some cases, it might even be the bottleneck that prevents more aggressive revisions of the product specifications. Thus, designers need better computer-aided design (CAD) tools that can accurately simulate their designs and do so in a fraction of the time taken by conventional simulators and this is where LIM comes in. Most circuit simulators rely on the solution of a large matrix that is formed by the elements of the circuit to solve for the voltages and currents in the circuit. When the number of elements increases, the size and solution time of this matrix can quickly get out of hand. LIM, instead, takes advantage of the latencies present (the capacitance and inductance) in circuits at high frequencies to perform a leapfrog solution of the voltages and currents, thus achieving a better scaling with respect to the circuit size. Published results thus far show that the solution time of LIM scales linearly with the number of nodes and branches in the circuit. In our paper, my student Tan Kin Hang and I have developed a reformulation of LIM that does not suffer from the stability limitation of the original LIM. In addition, the reformulation is presented in a closed-form expression which will minimise any increase in the computational burden when adopting the new formulation. The original LIM was well suited to handle circuits with inherent latencies such as in transmission lines. However, because of its explicit finite-difference formulation, it suffers from a stability limitation that is exacerbated when there are small latency elements in the circuit. Our reformulation alleviates this problem by going towards an implicit formulation, while at the same time minimising the computational burden that normally comes along with an implicit method through a forward branch marching scheme. We believe that this will open up a whole new possibility for LIM. Without the limitation on the time step size, we can now use LIM to solve problems that were previously notoriously ill-conditioned for LIM. We can even consider using LIM for any type of circuits, not just high-speed and high-frequency circuits. Of course, there will be challenges. All finite difference methods suffer from a numerical integration error, which is a function of the time step that accumulates over the solution period. When using the original LIM, this error is rarely an issue as the time step is always small enough due to the limitation by the stability condition, but with the option of using larger time steps in the new formulation, this error might become significant and will have to be addressed.