Abstract
Force sensor from interlink that use square pad forforce sensing is useful for many applications, as the resolution of this sensor continues and FPGA is digital, an ADC is required to deal with such sensor and as the embedded ADC of Spartan 3E kit need complex signals synchronization to work.This paper present a hardware design and optimized implementation based VHDL coding of control unit that make the ADC of Spartan 3E kit operate in real time. The system use Moore states machine style for generating ADC synchronization signals. Also, the result observed via new approach, which is instead of using chip scope for displaying values of ADC, LabVIEW FPGA environment is used so it‟s possible to display result on PC via USB. The control is optimizedand efficient due to using only 1% of FPGA chip and the measured force can be displayed in real time and the proposed control unit can be work as standalone or coprocessor architecture. General Terms FPGA, VHDL, LabVIEW FPGA, Force, Sensor.
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