Interfacial layer thickness dependent electrical characteristics of Au/(Zn-doped PVA)/n-4H-SiC (MPS) structures at room temperature

Abstract

Au/(Zn-doped PVA)/ n -4H-SiC metal/polymer/semiconductor (MPS) structures with different interfacial layer thickness values (50, 150, 500 nm) were fabricated and their electrical characteristics were compared. Their electrical parameters (i.e. reverse-bias saturation current ( I o ), ideality factor ( n ), zero-bias barrier height (BH) ( Φ bo ), series and shunt resistances ( R s , R sh )) were calculated from the forward bias current–voltage ( I F – V F ) data whereas other parameters (i.e. Fermi energy level ( E F ), BH ( Ф b ) and donor concentration ( N d )) were calculated from the linear part of C −2 – V characteristics at room temperature. Obtained results confirmed that the values of n , Φ bo , R s and R sh increase with increasing interlayer thickness, and linear correlation between n and Φ bo was observed. The high values of n for three structures can be ascribed to the presence of an interlayer, surface states ( N ss ) and barrier inhomogeneities. The energy density distribution profile of N ss was obtained from the I F – V F data by taking into account voltage-dependent effective BH ( Ф e ) and n for each structure. The R i vs V plot for these structures was obtained using both Ohm's law and Nicollian–Brews method. All these experimental results show that the interfacial layer and its thickness play an important role in main electric parameters of these structures.