Abstract
A metal–oxide–semiconductor (MOS) structure or a forward-biased pn junction with an interdigitated structure has been investigated for light-emitting devices using the standard Si complementary metal-oxide-semiconductor (CMOS) process. Current hysteresis is observed to be associated with the reduction of light emission in the MOS structure. An oxide trap level of 1.1±0.1 eV is found and contributes to Frenkel–Poole conduction in the high-current region. Furthermore, traps at the interface between silicon and oxide are believed to be responsible for light emission in both MOS structure and pn junction diodes.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
