Interface state trapping and dark current generation in buried-channel charge-coupled devices

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The effects of interface states on charge transfer efficiency (CTE) are compared in surface-channel and buried-channel charge-coupled devices (CCDs). Although the buried-channel CCD was developed partly to exclude the interaction between signal charge and interface states, this interaction will occur when the amount of signal charge exceeds the buried-channel storage capacity. For this situation, it is shown that CTE measurements may be used to directly and accurately determine the density of interface states in 4-phase buried-channel CCDs, using the same techniques previously developed for surface-channel devices. These measurements have been applied to several different N-buried-channel CCDs, some of which have been fabricated with radiation-hardened oxides, which have been exposed to ionizing radiation. Data from these devices reveal a linear dependence of the interface state electron-hole pair generation rate (i.e., CCD dark current) on the density of interface states. This dependence is the same for all devices studied and does not depend on whether the interface states are intrinsic, created by radiation, or reduced by annealing. From these data, a value for the geometric mean of the interface state electron and hole capture cross sections √(σn σp ) of 5.5×10−16 cm2 is obtained, in excellent agreement with values in the literature obtained by ac conductance and gate-controlled diode measurements.