Interface Engineering With Polystyrene for High-Performance, Low-Voltage Driven Organic Thin Film Transistor

Abstract

We report a solution-processed, high-performance organic thin-film transistor (OTFT), using polystyrene (PS) as interlayer with the semiconducting material P2TDPP2TFT4 as an active layer. We achieved a significant improvement employing the PS as an interlayer between the P2TDPP2TFT4 and ${{{\text {AlO}}}}_{X}$ gate insulator. The filed-effect mobility ( $\mu _{{{\text {FE}}}}$ ) and ON/OFF current ratio ${(}{I}_{{ \mathrm{\scriptscriptstyle ON}}}/{I}_{{ \mathrm{\scriptscriptstyle OFF}}}{)}$ reached to $0.82\,\,{{{\text {cm}}}}^{{{{2}}}}{\cdot } {{\text {V}}}^{{{-{1}}}}{\cdot } {{\text {s}}}^{{{-{1}}}}$ and ~105, respectively, which is higher than the devices fabricated with commonly used self-assembled monolayer (SAM) octadecyltrimethoxysilane (OTS) modified substrate under similar experimental conditions. Further analysis of the modified gate insulator utilizing atomic force microscopy, X-ray diffraction, and contact angle measurement revealed that smoother surface and lower surface energy were achieved by employing PS interlayer, which leads to more compatible surface energy with the semiconductor and interfacial trap passivation. Passivation of interfacial traps and lower surface energy using PS interlayer leads to the highly stable device performance, suggesting its application as a new interlayer with ${{{\text {AlO}}}}_{X}$ gate insulator to improve device performance.