Abstract

In this work, we present experimental results examining the energy distribution of the relatively high electrically active interface defects which are commonly observed in high-dielectric-constant (high-) metal–insulator–silicon systems during high- process development. This paper extends previous studies on the system to include a comparative analysis of the density and energy distribution of interface defects for , lanthanum silicate , and thin films on (100) orientation silicon formed by a range of deposition techniques. The analysis of the interface defect density across the energy gap, for samples which experience no annealing following the gate stack formation, reveals a peak density ( to ) at above the silicon valence bandedge for the , , and thin films on . The characteristic peak in the interface state density is obtained for samples where no interface silicon oxide layer is observed from transmission electron microscopy. Analysis suggests silicon dangling bond centers as the common origin for the dominant interface defects for the various /high-/metal gate systems. The results of forming gas annealing over the temperature range are presented and indicate interface state density reduction, as expected for silicon dangling bond centers. The technological relevance of the results is discussed.

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