Integration of diamond in fully-depleted silicon-on-insulator technology as buried insulator: A theoretical analysis

Abstract

We examine here by electro-thermal simulation tools (SILVACO's Atlas) a configuration of Silicon-On-Insulator substrate for Fully-Depleted MOSFET architectures, incorporating diamond as buried insulator, and compare it with traditional silicon dioxide BOX for the future technological nodes of the ITRS (90 nm and below). Our aim is to give major trends to be followed in order to optimize diamond integration from electrical and thermal points of view, constraints that must be kept in mind in parallel with the technological work on thin diamond films. In this theoretical study, we perform a benchmarking between SiO 2 and diamond BOX. We first point out that the BOX thickness should not be more than few hundred nanometers to maintain electrical performances. From thermal point of view, we demonstrate that the replacement of 100 nm thick buried oxide by a 100 nm thick diamond layer can lead to about 50% reduction of the temperature when only 33% decrease can be obtained with Ultra Thin SiO 2 BOX (20 nm). Furthermore, thick diamond BOX avoids the parasitic capacitances issue that reduces Ultra Thin BOX devices working frequency.