Integration of 5-V CMOS and High-Voltage Devices for Display Drive Applications

Abstract

Reduced surface field lateral double-diffused MOS transistors for the driving circuits of plasma display panel and field emission display in the 120 V region have been integrated for the first time into a low-voltage 1.2 μm analog CMOS process using p-type bulk silicon. This method of integration provides an excellent way of achieving both high power and low voltage functions on the same chip; it reduces the number of mask layers and also the cost of fabrication. The lateral double-diffused MOS transistor with a drift length of 6.0 μm and a breakdown voltage greater than 150 V was self-isolated to the low voltage CMOS ICs. The measured specific onresistance of the lateral double-diffused MOS is 4.8 mΩ·cm2 at a gate voltage of 5 V.