Abstract
In this paper, a novel silicon super-junction (SJ) MOSFET embedded with a soft reverse recovery body diode is proposed and studied by numerical simulation. The device introduces an n+-buffer layer between the n--buffer layer and the n+-substrate to improve the reverse recovery behaviour of its body diode. The n+-buffer layer provides residual carriers during the reverse recovery process, reduces the overshoot voltage, and suppresses oscillation. Simulated results demonstrate that the increment of the on-resistance and the drain-to-source overshoot voltage can be respectively kept below 5% and 20 V, if a 10 μm n+-buffer layer whose impurity concentration ranges from 4 × 1015 cm-3 to 6 × 1016 cm-3 is used. In addition, the fabrication process is the same as that of the conventional SJ-MOSFET. These features make the proposed SJ-MOSFET suitable for inverter applications.
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