Integrated Vacuum Micro-Electronics for Upper Milimeter Wave Applications

Abstract

Abstract : In this project MIT designed, fabricated, and characterized massive arrays of individually ballasted silicon field emitters that use vertical ungated field effect transistors (FETs) as flow control elements to produce high current. The first design implemented arrays of field emitters with square packing. Pulsed DC tests of these devices using and external extractor resulted in 0.5 A current emission (0.5 A.cm-2), clearing showing current limitation due to the vertical ungated FETs. Spatial emission uniformity was confirmed using a phosphorous screen. The design was modified because the dielectric between the extractor gate and the field emitter tips was too thick, which made unfeasible to make devices with integrated extractor. MIT developed two key technologies to correct the excessive dielectric thickness. First, we changed the cross-section of the ungated FET (from round to hexagonal) and packing of the vertical ungated FETS (from square to hexagonal) to maximize the emitter density and minimize the dielectric deposition needed. Second, we developed a plasma-based planarization method. Using the modified design, were able to fabricate large arrays of individually ballasted field emitters with an integrated extractor that is very close to the emitter tips using amorphous silicon as extractor material. Unfortunately, the electrical conductivity of the extractor was too low to make the device operational. Potential solutions for this problem is ion implantation of the extractor material and use of n-amorphous silicon films or sputtered metal.