Integrated electroless metallization for ULSI

Abstract

In this paper, we present a novel copper interconnect scheme where conducting, barrier and capping layers are deposited by electroless methods. Electroless copper deposition has been demonstrated for sub-0.25 μm metallization on large silicon wafers. In this paper, we extend the use of electroless deposition for the layers under and above the copper. After a short overview of electroless copper and barriers deposition we describe some of the current process modules and the properties of the thin films. Next we review the individual layer properties, describe their integration, and discuss the highlights and problems of the integration of copper, barriers, and capping layers, all deposited by electroless methods. The integrated process features deposition from an aqueous solution of copper and CoW alloys. The metals deposition is due to an electrochemical oxidation-reduction reaction that takes place on the liquid-solid interface. Electroless deposition is autocatalytic and the interconnect materials themselves can serve as seeds for some deposition solutions. In some cases, surface activation is required to initiate the autocatalytic process. We will discuss the issues of the seed layer and will present both ‘wet’ and ‘dry’ seeding methods. The deposition of both copper and the barrier layers is very conformal and we assume that the deposition rate is surface-reaction limited. In addition, we present recent results of the barrier material properties and experimental results of the fully integrated structure with and inlaid-copper technology.