Abstract
AbstractThe characteristic of the interface between InP and an insulator was investigated using an MIS structure on an InP substrate fabricated by using vacuum‐evaporated SiO or ZnS for the gate insulator and vacuum‐evaporated aluminum for the gate electrode. An interface state density of 5 × 1011 cm−2 eV−1 was obtained from the C ‐ V characteristic of the MIS diode fabricated on an n‐type InP. Annealing at a temperature between 100 and 200°C was effective in decreasing the hysteresis and the interface state density. InP MIS FET transistors were fabricated using vacuum‐evaporated SiO and ZnS films for the gate insulator, resulting in an excellent dc FET characteristic. The effective mobilities were as high as 3100 cm−2/V.s and 1400 cm−2/V.s when SiO was used on semiinsulating and p‐type InP substrates, respectively. When ZnS was used on a semiinsulating substrate, the effective mobility was 1800 cm−2/V.s.The mobility of the device was influenced strongly by the activation temperature of the ion‐implanted substrate. When the activation temperature was increased from 660°C to 700°C, the mobility decreased. This mobility decrease is considered to be due to Coulomb scattering in the channel.
Published Version
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have