Innovated L/S less than 2/2μm Line Embedded 2.1D Organic Substrate Technology

Abstract

Current organic substrates are limited to lines/space of 10/10um and via size around 50um. However, the semiconductor with advance node needs fine line/space of 5/5 or 3/3 and even 2/2μm in the future. Si Interposer provides a high density interconnection with fine line and small via that cannot be matched by current laminate substrate technology. But the challenge of Si interposer is the high cost. We have developed an ultra-thin line embedded substrate for 2.1D/2.5D SiP application. There are two types of approach to meet the requirement of line/space less than 2/2μm in the organic substrate. One is the conventional Semi-Additive Process (SAP) and another is laser embedded technology. The advantage of SAP is the good compatibility with current process but the problem is yield and reliability issue for narrow copper trace on the dielectric surface. From the current status, line/space of 5/5μm will be the process limitation of SAP and 2/2μm need to be further verified for HVM. Another solution is line embedded (LE) technology with the different structure. LE technology is different from SAP includes ablation of trench by laser and panel plating with electroplating copper and then removing copper above dielectric surface for formation of Cu pattern. There are several advantages of laser embedded comparing to SAP. First, the laser embedded substrate provides a flat surface after formation of pattern which is helpful for covering a thinner solder mask with better uniformity of thickness. It can avoid the voids formation while filling molding compound. Second, the laser embedded substrate not only allows the design of pad-less via to reduce both package size and format but also can put more traces near these vias. In this study, several key technologies of laser embedded are successfully integrated in the current substrate process. By the selection of the advanced dielectric film with a suitable design as a test vehicle to verify the feasibility of laser embedded technology with line/space of 5/5μm and 3/3μm design. However, the excimer laser ablated the pattern step-by-step and the throughput was much lower than lithography by exposure. The technology trend shows that the use of non-filler photo-sensitive dielectric (PID) by exposure/development to form trenches of signal paths is a good solution to increase throughput. L/S less than 2/2μm line embedded 2.1D organic substrate achievement by adopting innovated integration PID process will be further discussed.