Abstract
III-V semiconductors are being considered as promising candidates to replace silicon channel for low-power logic and RF applications in advanced technology nodes. InGaAs is particularly suitable as the channel material in n-type metal-oxide-semiconductor field-effect transistors (MOSFETs), due to its high electron mobility. In the present work, we report on InGaAs FinFETs monolithically integrated on silicon substrates. The InGaAs channels are created by metal–organic chemical vapor deposition (MOCVD) epitaxial growth within oxide cavities, a technique referred to as template-assisted selective epitaxy (TASE), which allows for the local integration of different III-V semiconductors on silicon. FinFETs with a gate length down to 20nm are fabricated based on a CMOS-compatible replacement-metal-gate process flow. This includes self-aligned source-drain n+ InGaAs regrown contacts as well as 4 nm source-drain spacers for gate-contacts isolation. The InGaAs material was examined by scanning transmission electron microscopy (STEM) and the epitaxial structures showed good crystal quality. Furthermore, we demonstrate a controlled InGaAs digital etching process to create doped extensions underneath the source-drain spacer regions. We report a device with gate length of 90 nm and fin width of 40 nm showing on-current of 100 µA/µm and subthreshold slope of about 85 mV/dec.
Highlights
Compound semiconductors based on arsenides (In1−x Gax As) [1] are considered promising candidates to replace silicon in nFETs for advanced and ultra-scaled CMOS technology nodes
We have previously developed an integration approach called template-assisted selective epitaxy (TASE) [13,14,15], based on the growth of different III-V materials within arbitrarily shaped oxide
In this work we demonstrate InGaAs n-FinFETs integrated on a silicon (100) substrate
Summary
Compound semiconductors based on arsenides (In1−x Gax As) [1] are considered promising candidates to replace silicon in nFETs for advanced and ultra-scaled CMOS technology nodes These materials offer a significant advantage in terms of electron mobility compared to silicon and are suitable for low-power applications [2,3,4,5]. Selective epitaxial techniques make possible, instead, local integration of III-V crystals in pre-defined regions [9,10]. This approach can potentially reduce the costs associated with III-V substrates and simplify the integration process
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