Gate Stack Reliability of MOSFETs With High-Mobility Channel Materials: Bias Temperature Instability

Abstract

To sustain the historical trend of performance enhancement of metal-oxide-semiconductor field-effect transistors (MOSFETs) for high-performance and low-power logic applications beyond the 10-nm technology node, InGaAs and Ge or GeSn are promising alternative channel materials to replace strained Si due to their high electron and hole mobility values, respectively. In addition to delivering higher drive current at a reduced supply voltage VDD, another challenge in integrating these materials is to achieve device lifetimes equal or better than that of the Si counterpart. In this paper, we report the results of bias temperature instability (BTI) investigations on InGaAs n-channel MOSFETs (nMOSFETs) and GeSn p-channel MOSFETs (pMOSFETs) with a common surface passivation and gate stack formation technology. While GeSn planar pMOSFETs with Si passivation show excellent negative bias temperature instability (NBTI) reliability, positive bias temperature instability (PBTI) reliability of InGaAs nMOSFETs needs further improvement. The strain effect on NBTI of Ge pMOSFETs will be discussed. The NBTI of Ge multiple-gate field-effect transistors (MuGFETs) will be also reported. In addition, we review the status of the BTI reliability for MOSFETs with high-mobility channel materials and discuss issues of BTI characterization of transistors with small bandgap channel materials and the importance of interface quality between channel materials and gate dielectrics for device BTI performance.