Influence of the Reference Layer Composition on the Back-End-of-Line Compatibility of Co/Ni-Based Perpendicular Magnetic Tunnel Junction Stacks

Abstract

Spin-transfer torque magnetic random access memory (STT-MRAM) is currently explored to challenge the dynamic random access memory and embedded memory applications. Perpendicular magnetic tunnel junction (p-MTJ) stacks used in the STT-MRAM must be compatible with CMOS back-end-of-line processing, such as high perpendicular magnetic anisotropy, high tunnel magnetoresistance (TMR), and intact resistance area (RA) product at temperatures, as high as 400°C. In this paper, we deposited a bottom-pinned Co/Ni-based p-MTJ stack with a trilayered Co/spacer/CoFeB as a reference layer and a CoFeB film as the storage layer. By replacing the standard Ta spacer material with CoFeBTa, the thickness of the spacer layer can be increased from 4 to 8 Å without TMR and RA penalty, which is beneficial to process controllability. Moreover, the TMR increases for an 8 Å CoFeB polarizer from 125% to 145% for a similar RA product after a 300°C 30 min anneal. In addition, the thermal budget of the p-MTJ stack containing a CoFeBTa spacer was improved. The p-MTJ stack with a 12 Å CoFeBTa reference layer spacer can even withstand annealing at 400°C for 90 min and can retain a TMR value of 100% at RA 10 Ω · μm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , while TMR dropped below 40% for the p-MTJ stack containing a pure Ta spacer layer.