Influence of substrate bias voltage on microstructure and mechanical characteristics of TiAlSiN coating deposited by High Power Impulse Magnetron Sputtering (HiPIMS)

Abstract

Substrate bias voltage has a presumably predominant and significant influence on the microstructural morphology and mechanical properties of HiPIMS deposited coatings. In the present investigation, it has been investigated in depth for a quaternary coating, TiAlSiN coating, which was deposited on the cemented carbide (WC-10 wt% Co) substrates. In this HiPIMS process, a pair of TiAl60 and a pair of TiSi34 targets were used. Four different substrate biases were set, i.e., −60, −90, −120, and −150 V to explore the difference in the coating characteristics. In every case, the substrate bias was also applied in pulsed mode but with an offset of 40 μs to the cathode pulse. Both cathode current and bias current were observed to increase from 87 to 98 A and 19 to 23 A, respectively, with increase of substrate bias voltage. As the bias voltage increased, the surface morphology became finer, and the cross-section morphology turned to be highly denser. The minimum and maximum grain sizes were estimated to be 7.23 nm and 9.90 nm at a substrate bias of −60 V and −150 V, respectively. Variation of Ti content (at.%) was noticed in the range of 28.35 to 30.71 with the increase of bias voltage. The maximum hardness of the coating was recorded to be 42.95 GPa at the bias voltage of −150 V. The adhesion level has been classified under HF1 in all deposition cases, as investigated by Rockwell indentation method, whereas the scratch test results suggest that a load range between 154 and 161 N is required for the complete delamination of the coating. Spallation and edge-chipping were the primary failure mechanisms during the scratching of the TiAlSiN coating.