Effect of substrate bias voltage on defect generation and their influence on corrosion and tribological properties of HIPIMS deposited CrN/NbN coatings

Abstract

Substrate bias voltage is one of the most influential deposition parameter for physical vapour deposition processes as it can directly control the adatom mobility during coating growth. It influences the hardness, roughness as well as the microstructure of the coatings. Thus, bias voltage could also affect the defect formation during the coating deposition. High Power Impulse Magnetron Sputtering (HIPIMS) has been proven useful in producing void free and arc droplet free dense coatings. However, such coatings can still suffer from some defects associated with external factors (independent of deposition technique), such as substrate irregularities and the flakes coming from the chamber components. In order to study the effects of bias voltage (Ub) on the defect formation during HIPIMS process, four sets of CrN/NbN coatings were deposited at Ub = −40 V, −65 V, −100 V and −150 V. Microscopic studies revealed that with the increase in bias voltage the coatings morphology was altered and the percentage of surface area covered by optically visible defects was increased from 3.13% to 4.30%. The defects on the coatings deposited at Ub = −100 V and −150 V led to preferential corrosive attack resulting in a sharp increase in corrosion current density during Potentiodynamic polarisation experiments. Room temperature pin-on-disc tribological tests exhibited the influence of defects on the wear behaviour; however, the coefficient of friction (μ) values were mainly influenced by the nature of the oxides formed during the tests. Coating microstructure and bilayer thickness, along with the coating defects determined the coefficient of wear (Kc) values. This study revealed that the coating deposited at Ub = −65 V had the highest wear resistance (Kc = 2.68 × 10−15 m3 N−1 m−1) and the lowest friction (μ = 0.48).