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Abstract
Silicon MESFETs in silicon-on-sapphire SOS technology were studied and a comparison was made between simulated and measured I- V characteristics of normally-off transistors. The comparisons have shown that the effective conducting-channel depth is only 40% of the actual Si film thickness. A novel simulation approach to compensate for the lack of free carriers close to the sapphire interface is described. Results from measured transistors is presented together with simulated behavior, and also a comparison between simulated and experimental complementary MESFET (CMES) inverter behavior is done. The influence of interface defects on subthreshold current is also discussed.
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