Abstract
The silicon carbide (SiC) power MOSFET is a promising solution for power electronics applications demanding high energy efficiency and high power density. For high-current applications, typically several transistors are operated in parallel, requiring synchronous switching. Commercial SiC power MOSFETs may, however, still show a significant performance spread in turn-on electrical behavior and, hence, lifetime in such a system. Based on a calibrated TCAD model of a commercial 1.2-kV SiC MOSFET, the impact of variations on the critical processing steps is evaluated. Controlling the epitaxial doping concentration as well as the interface trap density is most important for a low device-to-device variability. Furthermore, it is shown that the improvement of the output performance due to an increasing channel mobility quickly saturates.
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