Abstract
Abstract The charge storage properties of n-channel MOS transistors with 1 keV Si implanted gate oxides are investigated for 1 and 2×10 16 cm −2 Si densities through gate bias ( V g ) and time ( t ) dependent source-drain current ( I ds ) measurements. Low dose implanted devices exhibit a continuous (trap-like) charge storage process under both static and dynamic conditions in contrast to the high dose implanted case, where injection of a fixed amount of electrons into the Si nanocrystals at low electric fields leads to step-like I ds – t characteristics and discrete threshold voltage shifts versus V g at room temperature. These findings can be related to the spatial arrangement and structural state of the implanted Si material after annealing as deduced by a TEM study.
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