Influence of DSRD Operation Cycle on the Output Pulse Parameters

Abstract

Drift step recovery diodes (DSRDs) are semiconductor opening switches designed for the forming of high-voltage nanosecond pulses. DSRD-based circuit includes inductive energy storage and works as a high-efficient compression stage of the tens to hundreds of nanoseconds input pulse down to nanosecond or subnanosecond range output pulse. Despite the well-investigated physical principles, a lot of published DSRD simulations, and practical DSRD-based pulsers, the fundamental research aimed at optimization of DSRD circuit has not been conducted yet. The present letter shows the result of extensive experiments elucidating the maximum voltage rise rate, pulse compression ratio, energy losses, and prepulse amplitude in DSRD circuits. The explicit definitions of DSRD pulse parameters, which are vital for the optimization process, are suggested for the first time. It is demonstrated that optimizations of different parameters contradict each other, and there is no universal optimal solution. The compromise should be found for each application using the recommendations presented in the letter.