Influence of Doping and Tunneling Interface Stoichiometry on n+In0.5Ga0.5As/p+GaAs0.5Sb0.5 Esaki Diode Behavior

Abstract

Due to energy-filtering by band-to-band quantum mechanical carrier tunneling, Tunnel FETs promise the possibility of steeper subthreshold swings (SS < 60 mV/dec) than MOSFETs. Even if the ideal material combination is still unclear, simulations show that for a confined channel (width<10nm), the broken gap InAs-GaSb system is the most promising to have the lowest SS with the highest Ion at low supply voltages. On the other hand, it is demonstrated that Esaki diodes can be used to accurately measure Band to Band Tunneling (BTBT) for TFET performance prediction. Since the tunnel junction is key for the operation of both TFET and Esaki diodes operation, the effect of different kind of defects (dislocations, etc...) can be seen directly from the TAT current in the diode I-V trace. In this vein, we study in our work the Molecular Beam Epitaxy (MBE) growth and fabrication of n+InAs-p+GaSb Esaki diodes on three types of substrates: GaSb, GaAs and Si. We first present the pseudomorphic growth of n+InAs(Si)-p+GaSb(Si) Esaki diode on a (001) p+ GaSb substrate (ED1). We particularly show the influence of the InAs/GaSb interface nature on both structural and electrical quality. After choosing the right interface stoichiometry between InAs and GaSb, the growth of n+InAs(Si)-p+GaSb(Si) Esaki diode on GaAs is investigated (ED2). In here, 90° misfit dislocations (MDs) array at the GaSb/GaAs interface is used to accommodate the mismatch strain between GaSb and GaAs. After presenting the influence of the growth conditions on the MDs array formation, the electrical results of ED2 are compared to the ones of ED1. This learning is crucial to study the effect of dislocations on BTBT behavior in tunneling devices. In the last step, the integration of n+InAs(Si)-p+GaSb(Si) Esaki diode on (001) Si is presented (ED3) using a 300 mm GaAs on Si template grown by MOCVD. After presenting the detailed growth stack, we demonstrate a high quality n+InAs(Si)-p+GaSb(Si) growth on exactly oriented (001) Si substrate exhibiting a RMS surface roughness of 1.4 nm and a dislocation density (TD) of 9x107/cm2 , as determined by XRD analysis. In summary, this study gives a broad insight on the influence of different types of defects on the tunneling current. We demonstrate that this learning is crucial for the integration of TFETs onto large area commercial Si substrates.