Abstract
The total ionization dose (TID) effect and negative bias temperature instability (NBTI) effect of 130-nm partially-depleted silicon-on-insulator (PDSOI) MOSFETs fabricated on hardened wafers with silicon ion implantation and unhardened wafers are investigated. A TID-hardened PDSOI MOSFET up to 1 Mrad(Si) is obtained by Si+ implantation in buried oxide (BOX). The hardening benefits from the electron traps in the BOX introduced by Si+ implantation. Although the radiation hardening process has a rare impact on nominal electrical characteristics of the device before irradiation, it will affect the NBTI reliability, which is manifested as the decrease in the NBTI lifetime for the radiation-hardened devices. The energy distribution of positive charges built up during NBTI stress is obtained. It proves that more damage-related traps exist near the gate oxide/silicon interface for the radiation-hardened device, which accelerates the threshold voltage shift during the NBTI stress. This conclusion is also verified by the low-frequency noise characteristics.
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