Indicator-based lightweight steganography on 32-bit RISC architectures for IoT security

Abstract

Embedded devices with highly constrained resources are emerging in numerous application areas which include wireless sensor networks, Radio-Frequency IDentification (RFID) tags, and Internet of Things (IoT). These devices need to typically communicate small payload in the form of text/image/audio for which security is exceptionally essential. Considering the resource limitation on constrained devices, many crypto algorithms and a few stego algorithms have been designed with lightweight properties. Majority of these algorithms have been tested for lightweight property only based on their algorithmic attributes. Conversely, ensuring such lightweight characteristics by analysing their feasibility to reside and run in a constrained environment based on the device’s architectural attribute is inevitable for IoT applications. This paper aims to contribute by proposing an indicator based lightweight Least Significant Bit (LSB) steganography algorithm and to compare it’s algorithmic and device dependent implementation aspects with similar algorithms on popular 32-bit Reduced Instruction Set Computer (RISC) microcontrollers used in IoT platforms. The proposed variable embedding algorithm achieves a Peak Signal to Noise Ratio (PSNR) of over 46 dB with Normalised Cross Correlation (NCC) & Structural Similarity Index Measure (SSIM) being 0.9999 and 0.9998 respectively for an average embedding capacity of 1.5 bits per pixel. In addition to the above mentioned benchmarking parameter results, the Regular & Singular (RS) group and Sample Pair (SP) steganalysis, were also carried out to validate the security level of the proposed algorithm. On analysing the suitability of the proposed algorithm in terms of timing performance and memory requirements by implementing on different IoT hardware, the microcontroller with PIC32 core achieves a higher embedding throughput of over 2.7 Mega bits per second with a smaller memory footprint of less than 2 KB. Finally, the results obtained from the proposed work outperform the microcontroller implementation of stego algorithms reported in the literature.