Abstract

In this paper a voltage-to-frequency conversion (VFC) circuit with Binary Rate Multipliers (BRM) output is presented. We first analyze the spectrum value and percentage of Binary Bit Rate (BBR) power then reject the repeated power values, and select only one BBR signal to construct BRM by linear combination. A VFC design with 1 to 5 volts (Vin) and /spl plusmn/2.5 volts (Vout) can generate a BRM pattern (0 Hz-39.0625 kHz) in sine, triangular, sawtooth and square waveform. The average value of the VFC output signal is fed back to the input of the VFC in order to stabilize the pattern for BRM transmission. The output patterns and frequencies can be controlled either independently or simultaneously.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call