Abstract

An In 0.53 Ga 0.47 As/InAs composite channel MOS-HEMT exhibiting peak $f_{\tau } = 511$ GHz and peak ${f} _{\max }= 285$ GHz is demonstrated. Additionally, another device exhibiting peak $f_{\tau } = 286$ GHz and peak ${f} _{\max }= 460$ GHz is reported. The devices have a 1 nm / 3 nm Al x O y N z interfacial layer and ZrO 2 gate dielectric on a 2 nm / 4 nm In 0.53 Ga 0.47 As / InAs composite channel with a modulation doped In 0.52 Al 0.48 As back barrier. To reduce parasitic gate-source and gate-drain capacitances, a modulation doped In 0.52 Al 0.48 As / In 0.53 Ga 0.47 As / InAs composite quantum well is included between the gate edges and the N+ source and drain. Compared to the work of Wu et al. , addition of an In 0.52 Al 0.48 As back-barrier, scaling of S/D metal spacing, and scaling of channel thickness has enabled improved transconductance and increased ${f} _{\tau }$ . Short gate length devices ${f} _{\max }$ are limit by high $R_{G}$ due to poor metal filling of the T-Gate stem and large $C_{DS}$ due to a conductive etch stop layer. Long gate length devices exhibit better metal filling, reduced $R_{G}$ , and balanced ${f} _{\tau }$ , ${f} _{\max }$ . Devices exhibit 10–15% DC-1 GHz $g_{m,e}$ suggesting that the high-k / semiconductor interface has low $D_{it}$ .

Highlights

  • InP-based transistors are of interest for future high-frequency communication systems [2]–[3]

  • We report record fτ = 511 GHz for MOS-HEMT technology [1], [6]

  • Short-gate length devices fmax is limited by RG > 10

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Summary

INTRODUCTION

InP-based transistors are of interest for future high-frequency communication systems [2]–[3]. We report record fτ = 511 GHz for MOS-HEMT technology [1], [6] While this technology has yet to surpass the maximum reported fτ of standard InP-based HEMTs [7], improvements in the access region design, optimization of channel design [8], and further scaling of the gate dielectric can further increase gm,e. We report improvements to [1] achieved by including an In0.52Al0.48As back-barrier (increase gm,i) and reducing the source-drain metal spacing from 5 μm to 2 μm (decrease RS) These improvements yielded an increase of DC gm,e = 1.5 mS/μm to 2.2 mS/μm and an increase of fτ = 357 GHz to 511 GHz. Short-gate length devices fmax is limited by RG > 10

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