Abstract
In this paper, we present an in-built N+ pocket electrically doped tunnel FET (ED-TFET) based on the polarity bias concept that enhances the DC and analog/RF performance. The proposed device begins with a MOSFET like structure (n-p-n) with a control gate (CG) and a polarity gate (PG). The PG is biased at −0.7 V to induce a P+ region at the source side, leaving an N+ pocket between the source and the channel. This technique yields an N+ pocket that is realized in the in-built architecture and removes the need for additional chemical doping. Calibrated 2-D simulations have demonstrated that the introduction of the N+ pocket yields a higher ION and a steeper average subthreshold swing when compared to conventional ED-TFET. Further, a local minimum on the conduction band edge (EC) curve at the tunneling junction is observed, leading to a dramatic reduction in the tunneling width. As a result, the in-built N+ pocket ED-TFET significantly improves the DC and analog/RF figure-of-merits and, hence, can serve as a better candidate for low-power applications.
Highlights
A tunnel field-effect transistor (TFET) is considered to be one of the most promising candidates for low-power applications [1,2,3,4,5]
To address the aforementioned issues, we propose an in-built N+ pocket electrically doped TFET (ED-TFET) using the polarity bias concept [15,16,17], where the narrow N+ pocket is realized in the in-built architecture and does not require additional chemical doping
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Summary
A tunnel field-effect transistor (TFET) is considered to be one of the most promising candidates for low-power applications [1,2,3,4,5]. The PNPN TFET has the same structure as the conventional p-i-n TFET, except that a narrow N+ doped pocket is introduced between the source and the channel. Compared with the conventional TFET, the PNPN TFET exhibits an increased ON-state current, enhanced SS, and improved device reliability [9,10]. Using calibrated two-dimensional simulations, we demonstrate that the proposed in-built N+ pocket ED-TFET exhibits improved DC and analog/RF characteristics compared to the conventional.
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