In brief

Abstract

PAGE 810 Greek and Serbian researchers present a new recurrent neural network (RNN) for solving linear algebraic systems with finite-time convergence. The network can converge on a solution faster than previous methods due to inclusion of an exponential term in the Zhang neural network (ZNN). The work is validated by theoretical analysis and simulation. PAGE 816 Two researchers from South Korea introduce attention-guided domain adaptation networks for face recognition under an unsupervised setting. The proposed module is applied to category classifiers and domain discriminators in a channel-wise manner. By learning the optimal adaptation factor for each channel the networks successfully align source and target domains. The residual error ||Ax(t)−b||of VPFTZNN (5) (for γ= 100,p= 3 and q= 2) and GNN [12]. PAGE 840 A capacitor-based bionic synapse is proposed, harnessing the partial polarisation switching of multi-domain properties in polycrystalline Zr-doped HfO2 ferroelectric materials. The synapse shows multi-level capacitance modulation characteristics. This research lays the groundwork for realising high-density integration neuromorphic computing systems. Proposed attention-guided model. PAGE 806 Chinese researchers propose a time-difference integrator which can compensate for the time-error caused by leakage current in gated delay-buffer cells. It is implemented in a 28-nm CMOS process, achieving a gain of 27.39 dB with a 317 kHz 30 ps peak-to-peak sinosudal input and consumes 110.3 μW with 50 MHz sampling rate from a 0.9 V supply. Simplified schematic of the prepared capacitor with TiN/HZO/TiN structure. PAGE 808 Two researchers from New Zealand present the design and analysis of a tunable low-noise amplifier, capable of achieveing single-band (1 GHz), dual-band (1 GHz and 1.7 GHz–2.5 GHz) and wideband (1.6–2.5 GHz) operations. The amplifier has a measured power gain of 7–15 dB and a noise figure of 1.2–2.2 dB across all bands. Simulated integrated time error. Multimode tunable low-noise amplifier design.