Abstract
FTL (Flash Translation Layer) is a memory block controller that manages the challenges of a data storage system based on flash memory technology. The design of internal parallelism in MLC-based SSDs with virtual blocks resulted in various challenges and due to the physical structure of flash memory cells based on MLC technology, it is possible to write a new page in a data block at the address after the last page is written. In parallel-based SSD design based on virtual blocks, some writes create unusable pages at the memory space, and these created holes reduce memory efficiency; consequently, it reduces the life-time of memory blocks by creating more operations, and accelerates garbage collection and merging operations. The proposed FTL offers three steps to address this constraint. Firstly, an idea was proposed to prevent costly transitions and to distribute data more evenly at memory blocks (wear leveling). Secondly, the unused holes created in virtual blocks became much fewer resulting in increased utilization of memory space. At last, a policy was proposed to prevent update blocks (log blocks) from being blocked and to postpone the merging and garbage collection by which the memory lifetime increases significantly. Simulation results showed that the number of unused erased pages and the number of extra write operations decreased up to 23% and 17%, respectively. In addition, the number of invalid released pages increased up to 21% in the proposed FTL, and the speed of I/O executions to 3%.
Highlights
Access to high density is very important in solid-state drives (SSDs); NAND Flash memory technology is mainly used in SSDs [1]
The simulation results indicated that the number of unused pages erased during GC operation in the proposed FTL is reduced by 16-23% which results in increased memory utilization and prevents the early wearout of memory blocks caused by repeated and unnecessary erasing
WORKS The present study proposed a parallel structure-based FTL consisting of virtual blocks
Summary
Ds (Solid-State Disks), as a data storage system, have many capabilities such as high I/O operations, low power consumption and non-electronic components removal. There are three basic addressing methods; Page-level addressing in which there is a physical address corresponding to each logical address In this method, data access speed is very high, and the size of address table, proportional to the number of memory pages, is very large and too much memory space is occupied. Block-level addressing in which there is a physical address corresponding to each logical address associated with a block In this method, a page is accessible through the offset into that page, and the size of address table, proportional to the number of memory blocks, is lower than the previous method and less memory space is occupied [14].
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