Abstract
The author presents the basic potential failure mode and effect analysis (FMEA) technique as applied to IC assembly and shows how the technique is useful for complex package assembly and multichip module assembly. The FMEA technique can be described as a systemized group of activities intended to: (a) recognize and evaluate the potential failure modes and causes associated with the designing and manufacturing of an IC package; (b) identify actions which could eliminate or reduce the chance of the potential failure occurring; and (c) document the process. The use of FMEA for improving the manufacturability and manufacturing reliability of packages by a systematic and quantified analysis of the package design and process is also discussed.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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