Abstract

The impact of a thin interfacial SiO2 layer between HfO2 and SiC for the improvement of dielectric's electrical property was investigated. Regarding the material choice of dielectric on SiC, various combinations of HfO2 and SiO2 were examined on devices by capacitance and current measurements. It was found that the thickness of SiO2 interfacial layer is critical. As SiO2 grows thicker, excess carbon is believed to be generated in SiC close to SiC/SiO2 interface as observed by X-ray photoelectron spectroscopy. The defects induced during the growth of the SiO2 layer are believed to affect the inversion region in the substrate. Excess carbon does not behave as mobile ion when examined by bias-temperature stress, and it can induce considerable electron trapping under constant bias stress. On the other hand, large capacitance voltage (C-V) frequency dispersion appears when HfO2 is directly deposited on SiC. With 7.4 nm thin SiO2 layer between HfO2 and SiC, the C-V distortion and dispersion can be significantly eliminated. The leakage current with thin SiO2 layer was significantly reduced as compared with only HfO2 on SiC. Thin SiO2 (7.4) layer is beneficial to 4H-SiC MOS capacitors with respect to their dielectric and passivation properties.

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