Abstract
This paper deals with a new design method for the interfaces of a-Si:H pin solar cells that improves the stability and performances of devices deposited in a single batch chamber process. The method consists in removing a deposited sacrificial layer placed between the p/i and/or i/n interfaces by etching. This layer is an absorber of defects and impurities that are introduced in the interfaces, mainly from the chamber walls cross-contamination and the substrate surface. The results achieved increase the device fill factor and short circuit current density, respectively towards 75% and 16.3 mA cm −2, with a final efficiency of about 10%, before light soaking experiments.
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