Improvement in Device Performance of Vertical Thin-Film Transistors Using Atomic Layer Deposited IGZO Channel and Polyimide Spacer

Abstract

Technical strategies for improving the device characteristics of the In–Ga–Zn-O (IGZO) vertical channel thin-film transistors (VTFTs) were presented and investigated. The vertical sidewall was constructed by dry-etch process and subsequently covered with IGZO, Al2O3, and AZO as active, gate insulator, and gate electrode layers by means of conformal atomic-layer-deposition. An abrupt profile and flat back-channel were achieved by employing the spin-coated polyimide (PI) spacer. The Off-current was additionally alleviated simply by cutting the area of an active layer. The fabricated IGZO VTFT using PI spacer with an “active-cut” structure exhibited an On/off ratio of $10^{3}$ , a linear mobility of 7.1 cm2/Vs, and a subthreshold swing of 1.2 V/decade.