Abstract
The conventional device physics in most numerical simulations of bipolar transistors may not predict the measured electrical performance of shallow heavily doped emitters and bases. This paper summarizes improved device physics for numerical simulations of solid-state devices with dopant densities up to about 3 x 10 /sup 20/ cm /sup -3/ and with junction depths as small as 0.1 μm. This improved device physics pertains to bandgap narrowing, effective intrinsic carrier concentrations, carrier mobilities, and lifetimes. When this improved physics is incorporated into device analysis codes such as SEDAN and then used to compute the electrical performance of n-p-n transistors, the predicted values agree very well with the measured values of the current-voltage characteristics and dc common emitter gains for devices with emitter-base junction depths between 10-0.16 μm.
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