Abstract
The performance of static induction transistors (SITs), fabricated with 10.5-μm pitch (gate-to-gate spacing) has been reported previously.[1] This presentation will discuss the improvements in performance that are achieved when the pitch is further reduced to 7 μm. These new SITs have demonstrated saturated cw output power levels of 11OWat 225 MHz with 6-dB power gain and 68% drain efficiency, and 25W at 900 MHz with 9-dB power gain and 54% drain efficiency. This performance level was achieved while operating the SIT test amplifier at dc supply voltage levels up to 90V. Small-signal measurements on these SITs indicate a unity power gain frequency, f <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MAG</sub> , in X-band.
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