Improved interfacial and electrical properties of HfTiON gate-dielectric Ge MOS capacitor by using LaON/Si dual passivation layer and fluorine-plasma treatment

Abstract

Ge-based MOS capacitor with HfTiON/(LaON/Si) gate stacks and fluorine-plasma treatment (FPT) has been well investigated by transmission electron microscopy (TEM), electrical measurements and X-ray photoemission spectroscopy (XPS) in this work. Electrical measurements have shown that fluorine-plasma treated Ge MOS capacitor exhibits negligible hysteresis (15 mV), small gate leakage current (3.66 × 10−6 A/cm2 at Vfb + 1 V), and low interface-state density at midgap (3.2 × 1011 cm−2 eV−1). TEM results indicate that high quality LaSiON/Ge interfaces. XPS results further reveal the presence of fluorine incorporation and the less content of the Ge oxides at the LaSiON/Ge interface. These improvements should be attributed to the LaSiON passivation layer and FPT can suppress the formation of volatile and unstable Ge oxides. In addition, LaSiON passivation layer can further block inter-diffusion of elements between HfTiON and Ge substrate, and FPT can occupy the oxygen vacancies and reduce interface traps in the HfTiON dielectric and LaSiON/Ge interface. These greatly improve the performance of the Ge MOS device.