Abstract
VLIW DSPs can largely enhance the Instruction-Level Parallelism, providing the capacity to meet the performance and energy efficiency requirement of sensor-based systems. However, the exploiting of VLIW DSPs in sensor-based domain has imposed a heavy challenge on software toolkit design. In this paper, we present our methods and experiences to develop system toolkit flows for a VLIW DSP, which is designed dedicated to sensor-based systems. Our system toolkit includes compiler, assembler, linker, debugger, and simulator. We have presented our experimental results in the compiler framework by incorporating several state-of-the-art optimization techniques for this VLIW DSP. The results indicate that our framework can largely enhance the performance and energy consumption against the code generated without it.
Highlights
IntroductionVery Long Instruction Word (VLIW) architecture [1], which first appeared in 1972, typically has multiple functional units (FUs) and is capable of executing several instructions in parallel within one single clock cycle and is granted the ability to largely improve the Instruction-Level Parallelism (ILP)
Very Long Instruction Word (VLIW) architecture [1], which first appeared in 1972, typically has multiple functional units (FUs) and is capable of executing several instructions in parallel within one single clock cycle and is granted the ability to largely improve the Instruction-Level Parallelism (ILP).VLIW architecture is widely used in commercial process designs, such as NXP’s TriMedia media processors, Analog Devices’ SHARC DSP, Texas Instruments’ C6000 DSP family, STMicroelectronics’ T200 family based on the Lx architecture, Tensilica’s Xtensa LX2 processor, and Intel’s Itanium IA-64 EPIC, in both the embedded domain and the nonembedded domain.While it can be exploited to largely improve the ILP, it brings a large challenge for the development of software toolkit for VLIW architecture
These programs are first compiled by the Magnolia compiler and assembled and linked and loaded to the simulator to get the measurement of performance
Summary
Very Long Instruction Word (VLIW) architecture [1], which first appeared in 1972, typically has multiple functional units (FUs) and is capable of executing several instructions in parallel within one single clock cycle and is granted the ability to largely improve the Instruction-Level Parallelism (ILP). While it can be exploited to largely improve the ILP, it brings a large challenge for the development of software toolkit for VLIW architecture. We presented our methods and experiences to develop system toolkit flows for a VLIW DSP architecture. This VLIW DSP architecture is a scalable VLIW DSP architecture. Our system toolkit consists of compiler, assembler, linker, debugger, and simulator. The remainder of this paper is organized as follows: Section 2 describes the target VLIW DSP architecture.
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