Implementation of SOG devices with embedded through-wafer silicon vias using a glass reflow process for wafer-level 3D MEMS integration

Abstract

This study presents a novel system architecture to implement SOG (Silicon-on-Glass) MEMS devices on Si-Glass compound substrate with embedded silicon vias. The silicon vias connecting to the pads of device are embedded inside the Pyrex glass. Parasitic capacitance for both vias and microstructures is decreased and mismatch of coefficient of thermal expansion (CTE) is reduced. In applications, the glass reflow process together with the SOG micromachining processes were employed to implement the presented concept. Successfully driving of resonator through the silicon vias is demonstrated. The wafer-level hermetic packaging can be further achieved by anodic bonding of a Pyrex7740 wafer. Hermeticity of the packaging device which performed by Helium leak test satisfied the MIL-STD-883E. The packaged SOG device is SMT (Surface Mount Technology) compatible and ready for 3D microsystem integration.