Implementation of quadruple valued flip-flops using CMOS and spatial light modulator-based Savart plate

Abstract

The designing and simulation of multi-valued logic (MVL) is a very interesting and important task in the present scenario. The memory devices in MVL system are the most important area of modern research. The MVL system consists of a number of intermediate states between the true and false instead of the conventional binary logic consists of only two states - 'true' and 'false'. Hence, the MVL enables more information to be handled in a much compact manner, especially suitable for handling big data. In quadruple valued logic (QVL) system, the additional two intermediate states are denoted as 'partially known' and 'partially unknown' which can be explored significantly to sequential logics also, e.g., flip-flops, etc. The present paper deals with the design and simulation of different kind of flip-flops in QVL system, using complementary metal oxide semiconductor (CMOS) and its optical implementation using spatial light modulator (SLM) and Savart plate.